Structural reliability of integrated circuit chips in electronic packages continues to be a major concern due to ever increasing die size, circuit densities, power dissipation, and operating temperatures. A powerful method for experimental evaluation of die stress distributions is the use of test chips incorporating integral piezoresistive sensors, and this paper presents a review of the state-of-the-art in silicon piezoresistive stress sensor test chips.

Resistive rosettes on (100) silicon can be used to measure as many as four components of the six-component stress state whereas advanced test chips based upon (111) silicon can measure the complete stress state. However, not all of the measurements can be performed in a temperature compensated manner which is required for high accuracy results.

Classic resistor rosettes suffer from reduced sensitivity due to high doping levels, and they measure values of the die surface stress averaged over a relatively large area. Advanced stress sensors based upon the piezoresistive response of field-effect transistors are expected to provide improved sensitivity and highly localized measurement of stress sensitivity. Localized high sensitivity measurement can also be provided by new van der Pauw stress sensors.

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